rCore

Introduction

Introduction

Memory Management is an important component in Operating System, and plays key role both in Process/Thread implementation and I/O subsystem. It is a classic problem for OS designing and many book s illustrate Memory Management at length. However, implementing a memory management system is not easy, especially from zero to one. But it is also perhaps the most helpful approach to understanding the key principles of memory management. rCore lab 2 is focusing on the implementation of physical memory management through some classic methods like abstracting memory with frame.

Introduction

Over days debug I have not figured out why qemu in my machine always says something deffrent from the project manul. But now I can even send an issue to rCore group with my pull request, even though the key of the bug does lie in qemu or openSBI rather than rCore.

Introduciton

Writing an OS from zero to one based on RISC-V ISA in Rust. rCore lab1 is focusing on the interations of Interrupt an Exception with SBI, which is actually a bootloader that RISC has provided.

Exceptions: Also called interrupt. An unscheduled event that disrupts program execution; used to detect overflow.

Interrupts: An exception that comes from outside of the processor. (Some architectures use the terminterrupt for all exceptions.)